Multistage Amplifier Analysis

Building a single transistor amplifier that can power a speaker, drive a data line, or amplify a weak sensor signal to a usable level is often impossible. A single stage simply cannot provide enough gain, bandwidth, or output power alone. This is where multistage amplifiers come in, allowing you to strategically combine the strengths of different configurations. By cascading multiple amplifier stages, you can achieve an overall gain that is the product of individual stage gains, but you must master a critical non-ideal behavior: interstage loading, where each stage loads down the previous one, reducing its effective gain.

Why Cascade Stages?

The primary motivation for using multiple amplifier stages is to achieve a total voltage, current, or power gain that exceeds the capability of any single transistor stage. The fundamental principle is that the overall gain is the product of the gains of each individual stage. If you have two stages with voltage gains of $A_{v1}$ and $A_{v2}$, the total voltage gain is approximately $A_{v(total)}=A_{v1}\cdot A_{v2}$.

However, this simple multiplication only holds true if the stages are perfectly isolated from each other. In reality, the input impedance of the second stage acts as a load on the output of the first stage. This is the core challenge in multistage design: you are not just analyzing independent blocks, but a chain where each block affects its neighbor. Properly managing this interaction is key to predicting real-world performance from idealized stage models.

The Reality of Loaded Gain

To accurately analyze a multistage amplifier, you must move beyond the unloaded gain of each stage. The unloaded gain of an amplifier stage (like a common-emitter) is calculated assuming its output sees an ideal, infinite-impedance load. In a cascade, the load for the first stage is precisely the input impedance of the second stage.

Therefore, the loaded gain of a stage is always less than or equal to its unloaded gain. The analysis becomes a sequential process. First, you typically start from the final output stage and work backwards. You determine the input impedance of the last stage. This impedance becomes the load for the preceding stage, allowing you to calculate its loaded gain and output conditions. You then find the input impedance of that stage, which becomes the load for the stage before it, and so on. This backward-chaining method ensures you correctly account for loading effects at every junction.

For example, consider a simple two-stage common-emitter amplifier. The unloaded gain of the first stage might be $-200$. If the input impedance of the second stage is 5 kΩ and the output resistance of the first stage is 10 kΩ, the effective load on the first stage is the parallel combination of its collector resistor, the second stage's input impedance, and the transistor's own output resistance. This significantly reduces the load resistance, which directly reduces the first stage's voltage gain. The total gain will be the product of this reduced first-stage gain and the loaded gain of the second stage.

The Cascode Configuration for High Performance

When you need high gain combined with wide bandwidth, the cascode configuration is a powerful solution. It is not two independent stages in the traditional sense, but a clever stack of a common-emitter (CE) stage directly feeding into a common-base (CB) stage.

The transistor in the CE configuration provides good voltage gain but suffers from the Miller effect, where its base-collector capacitance is multiplied, severely limiting high-frequency response. The CB transistor, with its very low input impedance, acts as a current buffer. It accepts the output current from the CE transistor but presents a minimal resistive load to the CE transistor's collector. This low load drastically reduces the Miller multiplication of capacitance in the CE stage, resulting in a much wider bandwidth.

Furthermore, the output is taken from the collector of the CB stage, which has a high output impedance, making the cascode an excellent building block for high-gain, frequency-stable amplifier stages. The overall voltage gain of a cascode is approximately equal to the gain of the common-emitter stage alone, but its bandwidth and high-frequency performance are vastly superior to a single CE stage or a conventional two-stage CE cascade.

The Darlington Pair for High Current Gain

Sometimes, the design goal is not voltage gain but very high current gain. A prime example is the output stage of a power amplifier or a voltage regulator, where you need to deliver substantial current to a load with minimal current draw from the input signal source. This is the domain of the Darlington pair.

A Darlington pair connects two transistors such that the emitter current of the first transistor becomes the base current of the second. The total current gain (${\beta }_{total}$) of the pair is approximately the product of the individual transistor gains: ${\beta }_{total}\approx {\beta }_1\cdot {\beta }_2$. With two transistors each having a $\beta$ of 100, the pair can achieve an effective $\beta$ near 10,000.

This immense current gain allows you to control a large output current with a tiny input current. However, this comes with trade-offs. The base-emitter voltage of a Darlington is about twice that of a single transistor (roughly 1.4V for silicon), and its switching speed can be slower due to the time required to turn off the first transistor. Despite these drawbacks, its simplicity and effectiveness make it a cornerstone for high-current buffer and driver applications.

Common Pitfalls

1. Ignoring Interstage Loading: The most frequent error is using the unloaded gain formula for each stage and simply multiplying them. This will always overestimate the total gain. You must always calculate the loaded gain for each stage, using the input impedance of the following stage as its load.
2. Incorrect Analysis Order: Analyzing stages from input to output leads to confusion because the load for a stage isn't known until you've analyzed the next stage. Always adopt the output-to-input analysis method: start at the final load and work backward to the source.
3. Impedance Mismatch in Buffering: Failing to consider impedance when connecting stages can ruin performance. For instance, connecting a high-output-impedance stage (like a common-emitter) directly to a low-input-impedance stage (like a common-base) works well in a cascode. However, connecting it to another high-input-impedance stage (like another common-emitter) without consideration will lead to severe loading and gain loss. Using emitter followers as buffers between gain stages is a classic solution to this problem.
4. Overlooking Biasing Interactions: In DC analysis, the bias network of one stage can affect the operating point of the previous stage, especially if they are directly coupled. Always verify the quiescent (DC) conditions of the entire cascade, not just individual stages, to ensure all transistors remain in their active region.

Summary

• Cascading Stages is essential to achieve high overall gain, which is the product of individual stage gains, but this ideal product is degraded by interstage loading.
• Loaded Gain is the real gain of a stage when driving the finite input impedance of the next stage; accurate multistage analysis requires calculating this loaded gain sequentially from the output back to the input.
• The Cascode Configuration combines a common-emitter and common-base transistor to achieve high voltage gain with excellent high-frequency bandwidth by mitigating the Miller effect.
• The Darlington Pair connects two transistors to create a super-high-current-gain device, ideal for applications requiring a small input current to control a large output current.
• Successful design hinges on managing impedances between stages, often using buffer stages or specific configurations like the cascode to minimize unwanted loading effects.